Selected publications since 2000

1. F. S. Chim, T. K. Lam, Y.L. Wu, and H. Fan, "On Structural Analysis and Efficiency for Graph-Based Rewiring Techniques," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E94, No. 12, pp. Dec. 2011
2. H. Fan, J. Liu, Y.L. Wu, and C.C. Cheung, “The Exact Channel Density Bound and Compound Design for Generic Universal Switch Blocks”, ACM Transactions on Design Automation of Electronic Systems, Vol.12, no.2, April, 2007.
3. H. Fan, Y. L. Wu and C.C. Cheung, and J. Liu, “Decomposition Design Theory and Methodology for Arbitrary-Shaped Switch Boxes,” IEEE Transactions on Computers,  vol.55, no.4, pp.373-384, Apr.2006.
4. H. Fan, G. Liu, and J. Liu, “Minimal Regular 2-Graphs and Applications”, Science in China Ser. A. Mathematics. vol. 49, no. 2, 158-172, 2006.
5. J. Alber, H. Fan, M. Fellow, H. Fernau, R. Niedermeier, F. Rosamond and U. Stege, “Refined Search Tree Technique for Dominating Set on Planar Graphs”, Journal of Computer and System Sciences, vol.71, no.4, 385-405, 2005.
6. J. Ellis, H. Fan and M. Fellows, “The Dominating Set Problem is Fixed Parameter Tractable for Graphs of Bounded Genu”, Journal of Algorithms, vol. 52, no. 2, pp. 152-168, Aug. 2004.
7. H. Fan, J. Liu, Y. L. Wu and C.C. Cheung, “On Optimal Hyper Universal and Rearrageable Switch Box Designs,” IEEE Transactions on Computer Aided Designs, vol.22, no.12, pp.1637-1649, Dec. 2003.
8. H. Fan, J. Liu and Y. L. Wu, “General Models and a Reduction Design Technique for FPGA Switch Box Designs,” IEEE Transactions on Computers. vol. 52, no. 1, pp.21-30, Jan. 2003.
9. J. Liu, H. Fan, D. Porto, and Y. L. Wu, “An Efficient Exact Router for Hyper-Universal Switching Box,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E86-A, no. 6, pp. 1430-1436, June 2003.
10. H. Fan, J. Liu, Y. L. Wu, and C. K. Wong, “Reduction Design for Generic Universal Switch Blocks,” ACM Transactions on Design Automation of Electronic Systems, vol. 7, no. 4, pp.526-546, Dec.2002.
11. Y. L. Wu, C.C. Cheung, D. I. Cheng, and H. Fan, “Further Improve Circuit Partitioning using GBAW Logic Perturbation Techniques,” IEEE Transactions on Very Large Scale Integration Systems, vol. 11, no. 3, pp. 451-460, June. 2003.
12. H. Fan, Y. L. Wu, and Y. W. Chang, “Comment on General Universal Switch Blocks,” IEEE Transactions on Computers, vol. 51, no. 1, pp. 93-95, 2002.
13. J. Ellis, H. Fan and J. Shallit, “Computing the Cycles in the k-Way Shuffle,” Discrete Mathematics and Computer Science, vol. 5, no. 1, pp. 169-180, 2002.
14. H. Fan, J. Liu, Y. L. Wu, and Chak-Chung Cheung, “On Optimum Switch Box Designs for 2-D FPGAs,” Proc. IEEE/ACM Design Automation Conference (DAC), pp. 203-208, June 2001, Las Vegas.
15. Y. L. Wu, H. Fan, M. Marek-Sadowska, and C. K. Wong, “OBDD Minimization Based on Two-Level Representation of Boolean Functions,” IEEE Transactions on Computers, vol. 49, no. 12, pp. 1371-1379, 2000.
16. Y. L. Wu, W. N. Long, and H. Fan, “A Fast Graph-Based Alternative Wiring Scheme for Boolean Networks,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E83-A, no.6, pp. 1131-1137, 2000.